1. Field of the Invention
The invention relates to a method for enhancing the allocation efficiencies of the bottleneck resources, and more particularly, to a method for dynamically allocating the bottleneck resources by increasing the total moves and reducing the lost time for all tools next to the bottleneck resources.
2. Description of the Prior Art
Nowadays, single manufacturing line never satisfies the desires of the modern factory, which implies that a modern factory should manufacture various products to achieve the purpose of decreasing risks and increasing profits. It is a common sense that each tool of the factory can be employed to manufacture at least one product. Therefore, it is important for the factory to control the stream flow when dispatching lots to the consecutive tools.
To establish an ideal dispatching model becomes a widespread discussed issue in the present days. However, it is difficult to construct such a model that achieves the requirements of the modern factory. One critical issue for achieving the aforementioned requirements is how to properly allocate the bottleneck resources. Therefore, there is still no theoretical dispatching model that provides information representative of whether the bottleneck resource has been properly allocated based on on-line current data. Conventional approaches for allocating the bottleneck resources is just to assume those tools next to the bottleneck resource have balance loading. In the semiconductor fabs, the manufacturing lines are rarely balanced especially in there ramp-up period. It is evident that the bottleneck resource may stock many lots waiting for processing, which indicates the capacities of the fabs can be significantly degraded.
Please refer to FIG. 4, which shows a block diagram representative of another bottleneck is arisen when an improper resource allocation is employed at the bottleneck resource in a semiconductor fab. For example, the bottleneck tools 401 of the semiconductor foundry fab are usually PEOX machines. Tools 1.about.4 indicate those tools next to the bottleneck tool 401, such as the RTA, SACVD, and COATER machines etc. Sometimes, some of the tools 1.about.4 may be starving when they have no lots (e.g., Wafer-In-Process, WIP) for processing if the bottleneck tools 401 are not allocated properly. Another bottleneck next to the tools 1.about.4 will thus be arisen because there is no lots for performing the consecutive processes, too. A need has been arisen to disclose a method that suggests a theoretical model for allocating the bottleneck resources in accordance with the on-line data, in which the above-mentioned disadvantages such as the lost time of the tools can be minimized.